1. Field
This disclosure relates generally to semiconductor device packaging, and more specifically, to quad flat no lead packaging.
2. Related Art
Array quad flat no lead (QFN) and power QFN (PQFN) packages typically comprises an integrated circuit (IC) die attached and electrically connected to a lead frame with more than one rows of lead terminal. The IC die, the electrical connections and a portion of the lead frame are encapsulated by a mold compound, leaving a portion of the leads exposed. The exposed leads serve as input and output (IO) connections to the encapsulated IC die and are typically located along a periphery of the QFN package. Because QFN packages provide a number of advantages over other lead frame package configurations including, for example, shorter electrical paths and faster signal communication rates, QFN packages are widely used as low pin count solutions for power elements and other IC die.
In the semiconductor industry, array QFN and power QFN (PQFN) packaging typically has two types of lead arrangement: in-line leads and stagger leads. In-line leads require a half saw process to singulate the inner leads with the die flag. However, it is very difficult to control the saw depth during the half saw process due to warpage of the Mold-Array-Process (MAP) type semiconductor package. Half saw process can also introduce quality problems such as metal bur and metal smearing. Stagger leads do not require the half saw process but inner lead supporting bars can be so weak that they are easily deformed during production.
Additionally, there is a strict restriction on minimum lead pitch due to the constraints of etching processes in lead frame production and stiffness required to avoid lead deformation during lead frame production and semiconductor assembly process.
Other limitations of both inline and stagger leads are the difficulties in making multiple rows of leads in applications with high wire density requirements, and making irregular shape and layout of lead terminals, as well as the different thickness and materials between lead terminals and other portions of lead frame.
Lead frames provide a central supporting structure of molded IC packages to which all other elements of the molded IC package are attached. Lead frames are etched or stamped from a thin sheet metal strip to form a pattern of terminals around a central die attach platform upon which a die is mounted using, for example, an epoxy resin. The die includes bonding pads which are electrically connected to the surrounding lead terminals of the frame by fine-diameter conductive wires using well-established wire bond techniques. The assembly including the lead frame, die, and wires are covered with a thermoset plastic casing to complete the molded IC package.
In PQFN packages, a thick lead frame around twenty mils is used for high power dissipation but it is difficult to reduce lead pitch due to constraints of copper etching processes for very thick lead frames. Dual gauge lead frame design, where thick lead frame is stacked on top of a standard thin lead frame, is a solution to address this issue, but the manufacturability of dual gauge lead frames is not as good as the single gauge design, for instance, the dual gauge lead frame often leads to mold compound resin bleed due to the stacking of the lead frames. Moreover, dual gauge lead frames double the cost of lead frame.